Junior SoC Design Verification Engineer, Google Cloud
- Tel Aviv, Israel
- Company career page
- Last checked
Mentioned in this posting
- GCP
- SystemVerilog
- FPGA
- ASIC
- SoC Design
Description
Minimum qualifications Bachelor's degree in Electrical Engineering, a related technical field, or equivalent practical experience. 1 year of experience using verification components and environments in standard verification methodology. Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.