Senior Signal Integrity Engineer

Experience with advanced simulation tools and techniques. Experience with high-speed interfaces such as 112Gbps PAM4 Ethernet, PCIe Gen5, and DDR5. In-depth knowledge of high-speed PCB design and layout principles. Familiarity with power integrity and power noise simulation Requirements Bachelor's or Master’s degree in Electrical/Electronics Engineering with 10+ years of relevant experience. Strong understanding of electromagnetic (EM) concepts and transmission line theory. Extensive experience in signal integrity analysis for high-speed serial interfaces, including Ethernet, PCIe, and DDR5. Proficiency in using EDA tools like Ansys SIWAVE, HFSS, or similar. Hands-on expertise in time-domain and frequency-domain analysis, jitter, loss, and eye-diagram analysis. Strong background in HSPICE simulations and model development. Experience with PCB layout techniques for high-speed designs. Excellent communication skills and the ability to work effectively in a collaborative team environme